Fetch-decode-execute cycles, or the instruction or machine cycles (we don’t mean laundry!), are fundamental in computer architecture and microprocessor design. It outlines the basic steps that a central processing unit (CPU) performs when executing instructions in a computer program. The cycle consists of three main stages:

  1. Fetch: In this stage, the CPU fetches (retrieves) the next instruction from memory. The program counter (PC) holds the memory address of the next instruction to be executed. The instruction is fetched from that memory location and loaded into the CPU’s instruction register (IR).
  2. Decode: After the instruction is fetched, the CPU decodes the instruction. This involves determining which operation the instruction specifies and which operands (data) are involved. The CPU’s control unit interprets the instruction’s binary code and generates signals to control other parts of the CPU and its components accordingly.
  3. Execute: In this stage the CPU performs the actual operation or computation as specified by the decoded instruction. This might involve calculations, data manipulation, or interactions with other hardware components. The operation results are stored as needed in registers, memory, or other storage locations.

After the execution stage, the cycle starts again with the fetch stage for the next instruction in memory. This cycle repeats continuously, allowing the CPU to sequentially execute the instructions of a program, carrying out the necessary computations and operations. That CPU concept is also utilized in modern microcontrollers, which are CPU based with the addition of integrated memory, I/O peripherals, etc.

Fetch-decode-execute cycles are the foundational concept that enables a CPU to execute machine-level instructions and perform the tasks required by computer programs. It forms the basis of how modern computers process instructions and data.

Diagram: Fetch-Decode-Execute Cycles
Diagram: Fetch-Decode-Execute Cycles